Re: TBTF for 1999-10-05: Offlist

Eugene Leitl (
Fri, 8 Oct 1999 11:32:59 -0700 (PDT)

Robert Harley writes:

> Yes!
> The ESA has just released a VHDL model under GNU GPL of a SPARC chip,
> that even fits on an FPGA:

Why would one want to press a big architecture such as SPARC into a
limited-resource FPGA when there are MISC designs out there which just
take 20 kTransistors, or so?

The whole idea of hardware/software being distinctive starts eroding
with FPGA anyway. Eventually, the last stage of your compiler will be
a silicon compiler stage, and you would be swapping out (to RAM)
pieces of circuitry, not code.

And then GA on analog FPGA looms on the horizont... Grow your own.