[FoRK] low probability bits

Eugen Leitl eugen at leitl.org
Mon Feb 23 02:17:35 PST 2009

On Sun, Feb 22, 2009 at 10:47:26PM -0800, Aaron Burt wrote:

> 1. Google "boundary-scan".  Random bitstream generation is a high art
> for VLSI and FPGA designers.

Speaking about test patterns for VLSI, some do it with CAs:

> 2. Take e.g the sequence 0-255, sort by sum of 1s into a table.
> Generate a biased random number between 0 and 255, look up in table,
> voila! 8 biased random bits.

Eugen* Leitl <a href="http://leitl.org">leitl</a> http://leitl.org
ICBM: 48.07100, 11.36820 http://www.ativel.com http://postbiota.org
8B29F6BE: 099D 78BA 2FD3 B014 B08A  7779 75B0 2443 8B29 F6BE

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