[FoRK] Fwd: Sandia Lab Fires Up 300, 000 Virtual Android Devices To Test Out Security
sdw at lig.net
Wed Oct 3 09:24:29 PDT 2012
On Wed Oct 3 08:17:14 2012, Joseph S. Barrera III wrote:
> On 10/3/2012 8:11 AM, Gregory Alan Bolcer wrote:
> > My VLIW is longer than your CISC.
> I bet it's faster, too.
Nothing seems to beat current generation Intel/AMD memory bandwidth /
instructions executed for sheer throughput per clock cycle for misc.
instructions, compilers etc.
However, for SIMD, our expert assembly developers have made it clear
that the ARM NEON SIMD is much better than the Intel SSE SIMD. This is
true at least in the wide range of interesting SIMD instructions that
NEON has that dwarfs what SSE can do. For the right kind of
algorithms, ARM does better at operations per cycle at much lower
power. That's why a quad-core 1.7Ghz ARM/NEON core has a top
theoretical performance of about 60 Gigaops/sec.
DSPs are often extreme VLIW, and super low power, but ARM is only
somewhat VLIW. They do a lot in each instruction, including
conditional execution flags for a lot of them, autoincrement pointers,
etc. Combined with Thumb2 compressed instructions, it can make code
small. Still slower than Pentium class overall, but interesting.
> - Joe :->
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